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FP7171 universal high brightness led driver t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 1 / 12 general description the FP7171 is an open loop, current mode, control led driver ic. the FP7171 can be programmed to operate in either a constant frequency or constant off - time mode. it includes an 15 - 450v linear regulator which allows it to work fr om a wide range of input voltages without the need for an external low voltage supply. the FP7171 includes a pwm dimming and 0 - 250mv linear dimming input which can be used for linear dimming of the led current. the FP7171 is ideally suited for buck led d rivers. since the FP7171 operates in open loop current mode control, the controller achieves good output current regulation without the need for any loop compensation. features ? switch mode controller for single switch led drivers ? enhanced drop - in replacem ent to the FP7171 ? open loop peak current controller ? internal 15 to 450v linear regulator ? constant frequency or constant off - time operation ? linear and pwm dimming capability ? requires few external components for operation applications ? dc/dc or ac/dc led driver applications ? rgb backlighting led driver ? back lighting of flat panel displays ? general purpose constant current source ? signage and decorative led lighting ? chargers typical application circuit p w m d v d d l d r t v i n c s g n d g a t e f p 7 1 7 1 l i n e a r d i m m i n g p w m d i m m i n g v i n
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 2 / 12 function block diagram pin descriptions so p - 8 l name no. i / o description vin 1 i this pin is the input of an 15 - 450v linear regulator. cs 2 i this pin is the current sense pin used to sense the fet current by means of an external sense resistor. gnd 3 p ground return for all internal circuitry. gate 4 o this pin is the output gate driver for an external n - channel power mosfet. pwmd 5 i this is the pwm dimming input of the ic. vdd 6 i this is the power supply pin for all internal circuits. ld 7 i this pin is the linear dimming input of the ic. rt 8 i this pin sets the oscillator frequency. when a resistor is connected between rt and gnd, the FP7171 operates in constant frequency mode. when the resistor is connect ed between rt and gate, the ic operates in constant off - time mode. g n d r t l d p w m d c s v i n p o r v d d + _ + _ b l a n k i n g o s c i l l a t o r q s r g a t e 2 5 0 m v 1 2 3 4 8 7 6 5 t o p v i e w 9 f a - 8 6 l f p 7 1 7 1 v i n c s g n d g a t e r t l d v d d p w m d
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 3 / 12 marking information halogen free : halogen free product indicator lot number : w afer lot number s last two digits for example: 1323 86 tb ? 86 internal id : internal identification code per - half month : production period indicated in half month time unit for example: january a (front half month), b (last half month) february c (front half month), d (last half month) year : production year s last digit h a l o g e n f r e e l o t n u m b e r i n t e r n a l i d p e r - h a l f m o n t h y e a r f p 7 1 7 1 9 f a - 8 6 l
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 4 / 12 order ing information part number operating temperature package moq description fp 7171 dr - g1 - 25 c ~ +85 c sop - 8l 2500 ea tape & reel absolute maximum ratings parameter symbol conditions min. typ. max. unit power supply voltage v in v in to gnd 4 7 0 v vdd vdd to gnd 8 v cs, ld, pwmd, gate, rt - 0.3 v dd - 0.3v v allowable power dissipation p d sop - 8l t a Q +25 c 6 3 0 mw junction to ambient thermal resistance ja 128 c / w operating temperature - 25 + 125 c storage temperature t s sop - 8l - 40 + 150 c sop - 8l lead temperature (soldering, 10 sec) +260 c ir re - flow soldering curve
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 5 / 12 recommended operating conditions parameter symbol conditions min. typ. max. unit supply voltage v cc 15 4 5 0 v operating temperature - 25 125 c d c electrical characteristics ( v cc = 15 v, t a = 25 c , unless otherwise noted) parameter symbol c onditions min. typ. max. unit internal regulator internally regulated voltage v dd vin = 15 v, i dd(ext) = 0, 500pf at gate; rt = 226k , pwmd = vdd 7.25 7.5 7.75 v line regulation of vdd v dd vin = 15 C 450 v, i dd(ext) =0, 500pf at gate; rt = 226k , pwmd = vdd 0 - 1.0 v internal regulator load regulation of v dd v dd,load i dd(ext) = 0 - 1.0ma, 500pf at gate; rt = 226k , pwmd = vdd 0 100 mv v dd undervoltage lockout threshold uvlo v dd rising 6.45 6.7 6.95 v v dd undervoltage lockout hysteresis uvlo v dd falling 500 mv pwm dimming pin pwmd input low voltage v en(lo) v in = 15 - 450v 0.9 pin pwmd input high voltage v en(hi) v in = 15 - 450v 1.8 pin pwmd pull - down resistance at pwmd r en v pwmd = 5.0v 50 100 150 k current sense comparator current sense pull - in threshold voltage v cs,th - 40 c < t a < +85 c t a < +125 c offset voltage for ld comparator v offset - 12 12 mv current sense blanking interval t blank 0 < t a < +85 c, v ld = v dd , v cs = v cs,th + 50mv after t blank 150 215 280 ns - 40 < t a < +125 c, v ld = v dd , v cs = v cs,th + 50mv after t blank 145 215 315 delay to output t delay 80 150 ns oscillato r oscillator frequency f osc r t = 1.00m 20 25 30 khz r t = 226k 80 100 120 gate driver gate sourcing current i source v gate = 0v, v dd = 7.5v 165 ma gate sinking current i sink v gate = v dd , v dd = 7.5v 165 ma gate output rise time t rise c gate = 500pf, v dd = 7.5v 30 50 ns gate output fall time t fall c gate = 500pf, v dd = 7.5v 30 50 ns
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 6 / 12 function description input voltage regulator the FP7171 can be powered directly from its vin pin and can work from 15 - 450vdc at its vin pin. when a voltage is applied at the vin pin, t he FP7171 maintains a constant 7.5v at the vdd pin. this voltage is used to power the ic and any external resistor dividers needed to control the ic. the vdd pin must be bypassed by a low esr capacitor to provide a low impedance path for the high frequency current of the output gate driver. the FP7171 can also be operated by supplying a voltage at the vdd pin greater than the internally regulated voltage. this will turn off the internal linear regulator of the ic and the FP7171 will operate directly off th e voltage supplied at the vdd pin. please note that this external voltage at the vdd pin should not exceed 8 v. although the vin pin of the FP7171 is rated up to 450v, the actual maximum voltage that can be applied is limited by the power dissipation in t he ic. for example, if an 8 - pin soic (junction to ambient thermal resistance r,j - a = 128c/ w) FP7171 draws about i in = 2.0ma from the vin pin, and has a maximum allowable temperature rise of the junction temperature limited to about t = 100c, the maxim um voltage at the vin pin would be: in these cases, to operate the FP7171 from higher input voltages, a zener diode can be added in series with the vin pin to divert some of the power loss from the FP7171 to the zener diode. in th e above example, using a 100v zener diode will allow the circuit to easily work up to 450v. the input current drawn from the vin pin is a sum of the 1.0ma current drawn by the internal circuit and the current drawn by the gate driver (which in turn depen ds on the switching frequency and the gate charge of the external fet). in the above equation, f s is the switching frequency and qg is the gate charge of the external fet (which can be obtained from the datasheet of the fet). v ma w c c i r t v o o in a j max in 390 2 1 / 128 100 1 , ) ( ? ? ? ? ? ? ? ? s g in f q ma i ? ? ? 0 . 1
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 7 / 12 cu rrent sense the current sense input of the FP7171 goes to the noninverting inputs of two comparators. the inverting terminal of one comparator is tied to an internal 250mv reference whereas the inverting terminal of the other comparator is connected to th e ld pin. the outputs of both these comparators are fed into an or gate and the output of the or gate is fed into the reset pin of the flip - flop. thus, the comparator which has the lowest voltage at the inverting terminal determines when the gate output is turned off. the outputs of the comparators also include a 150 - 280ns blanking time which prevents spurious turn - offs of the external fet due to the turn - on spike normally present in peak current mode control. in rare cases, this internal blanking might no t be enough to filter out the turn - on spike. in these cases, an external rc filter needs to be added between the external sense resistor (r cs ) and the cs pin. please note that the comparators are fast (with a typical 80ns response time). hence these compa rators are more susceptible to be triggered by noise than the comparators of the FP7171 . a proper layout minimizing external inductances will prevent false triggering of these comparators. oscillator the oscillator in the FP7171 is controlled by a single resistor connected at the rt pin. the equation governing the oscillator time period t osc is given by: if the resistor is connected between rt and gnd, FP7171 operates in a constant frequency mode and the above equation determines t he time - period. if the resistor is connected between rt and gate, the FP7171 operates in a constant off - time mode and the above equation determines the offtime. 25 22 ) ( ) ( ? ? ? k r us t t osc
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 8 / 12 linear dimming the linear dimming pin is used to control the led current. there are two case s when it may be necessary to use the linear dimming pin. ? in some cases, it may not be possible to find the exact rcs value required to obtain the led current when the internal 250mv is used. in these cases, an external voltage divider from the vdd pin ca n be connected to the ld pin to obtain a voltage (less than 250mv) corresponding to the desired voltage across rcs. ? linear dimming may be desired to adjust the current level to reduce the intensity of the leds. in these cases, an external 0 - 250mv voltage can be connected to the ld pin to adjust the led current during operation. to use the internal 250mv, the ld pin can be connected to vdd. note: although the ld pin can be pulled to gnd, the output current will not go to zero. this is due to the presence of a minimum on - time (which is equal to the sum of the blanking time and the delay to output time) which is about 450ns. this will cause the fet to be on for a minimum of 450ns and thus the led current when ld = gnd will not be zero. this current is also d ependent on the input voltage, inductance value, forward voltage of the leds and circuit parasitics. to get zero led current, the pwmd pin has to be used. pwm dimming pwm dimming can be achieved by driving the pwmd pin with a low frequency square wave si gnal. when the pwm signal is zero, the gate driver is turned off and when the pwmd signal if high, the gate driver is enabled. since the pwmd signal does not turn off the other parts of the ic, the response of the FP7171 to the pwmd signal is almost instan taneous. the rate of rise and fall of the led current is thus determined solely by the rise and fall times of the inductor current. to disable pwm dimming and enable the FP7171 permanently, connect the pwmd pin to vdd.
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 9 / 12 application information the fp717 1 is optimized to drive buck led drivers using open - loop peak current mode control. this method of control enables fairly accurate led current control without the need for high side current sensing or the design of any closed loop controllers. the ic uses very few external components and enables both linear and pwm dimming of the led current. a resistor connected to the rt pin programs the frequency of operation (or the off - time). the oscillator produces pulses at regular intervals. these pulses set the sr flip - flop in the FP7171 which causes the gate driver to turn on. the same pulses also start the blanking timer which inhibits the reset input of the sr flip flop and prevent false turn - offs due to the turn - on spike. when the fet turns on, the current thro ugh the inductor starts ramping up. this current flows through the external sense resistor r cs and produces a ramp voltage at the cs pin. the comparators are constantly comparing the cs pin voltage to both the voltage at the ld pin and the internal 250mv. once the blanking timer is complete, the output of these comparators is allowed to reset the flip flop. when the output of either one of the two comparators goes high, the flip flop is reset and the gate output goes low. the gate goes low until the sr flip flop is set by the oscillator. assuming a 30% ripple in the inductor, the current sense resistor r cs can be set using: constant frequency peak current mode control has an inherent disadvantage C at duty cycles greater than 0.5, th e control scheme goes into subharmonic oscillations. to prevent this, an artificial slope is typically added to the current sense waveform. this slope compensation scheme will affect the accuracy of the led current in the present form. however, a constant off - time peak current control scheme does not have this problem and can easily operate at duty cycles greater then 0.5 and also gives inherent input voltage rejection making the led current almost insensitive to input voltage variations. but, it leads to v ariable frequency operation and the frequency range depends greatly on the input and output voltage variation. FP7171 makes it easy to switch between the two modes of operation by changing one connection (see oscillator section). ) ( 15 . 1 ) ( 25 . 0 a i orv v r led ld cs ? ?
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 10 / 12 suggested layout c i n l e d c l e d d 1 q 1 r c s c v d d r t p w m d v d d l d r t v i n c s g n d g a t e l 1 f p 7 1 7 1 v i r t o g n d v i r t o g n d v i r t o v i n v i n g n d
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 11 / 12 typical application c i n l e d 4 . 7 u f c l e d 1 u f d 1 e r 2 j q 1 q m 0 1 n 6 5 u r c s c v d d 0 . 1 u f r t p w m d v d d l d r t v i n c s g n d g a t e l 1 3 . 3 m h f p 7 1 7 1 5 2 2 0 k
FP7171 t his datasheet contains new product information. feeling technology reserves the rights to modify the product specification w ithout notice. no liability is assumed as a result of the use of this product. no rights under any patent accompany the sales of the product. website: http://www.feeling - tech.com.tw rev. 0. 6 12 / 12 package outline sop - 8l unit: mm n ote: 1. p ackage dimensions are in compliance with j edec o utline : ms - 012 aa . 2. d imension d does not include molding flash, protrusions or gate burrs. 3. d imension e does not include inter - lead flash, or protrusions . symbols min. (mm) max. (mm) a 1.346 1.752 a1 0.101 0.254 a2 1.498 d 4.8 00 4.978 e 3.81 0 3.987 h 5.791 6.197 l 0.406 1.27 0 ? 0 8

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